Parasitic Inductance of Bypass Capacitor II
Wow! This Fall has been a B-U-S-Y quarter, taking me on trips to California, Massachusetts, Arizona, New Mexico, Colorado, and Malaysia. It's great to return home for a quiet, and restful, holiday season.
Our Thanksgiving turkey turned out beautifully this year. The cheap Wal-Mart smoker on the back porch takes frequent tending to keep the fire going in its little smoke box, but the results justify the means. After spending twelve hours smothered in apple-wood smoke and maple-flavored sauce our 22-lb turkey turned an incredibly deep reddish hue, delighting our guests who had never before enjoyed a barbequed turkey. To top it off, it snowed the next day so the kids all got to go sledding.
On a completely different subject, I'd like to say thanks to everyone who has developed an interest in my latest book, High-Speed Signal Propagation.
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Parasitic Inductance of Bypass Capacitor II
The following values for the inductance of a surface-mounted bypass capacitor were collected using the step-response technique described in chapter 8 of High-Speed Digital Design: Handbook of Black Magic, ISBN 013395724-1, and discussed in detail during my video "Bypass Capacitor Inductance", which is shown as part of my regular class. I hope you find the numbers useful.
The measurement setup is similar to that shown in Fig. 1.11, p. 18, of High-Speed Digital Design (if you don't have the book, it's just a step-response test setup with a step source impedance of about five ohms).
In taking these measurements I've made two major simplifications that improve the accuracy of the result.
First, since the effective series inductance of a bypass
capacitor has to do only with the shape of the conductive region (i.e., where
the current goes), and nothing to do with the dielectric, I have eliminated the
dielectric. The components under test in this experiment are simply blocks of
solid metal, shaped to mimic the shape of the vias, mounting pads, solder
fillet, and body of a surface-mounted bypass capacitor. This technique produces
a physical component with the same effective series inductance as a real bypass
capacitor, but no significant series resistance and no series capacitance
(mathematically, the capacitance is infinite). My solid-metal-body measurement
technique ignores fine details of the internal construction of the bypass
capacitor. Such a technique works because the effective inductance of a
practical monolithic ceramic bypass capacitor under actual conditions of use has
overwhelmingly to do with the mounting configuration of its vias and pads and
very little to do with the internal construction of the part. That this
assumption is a good one is easily demonstrated by mounting a real bypass
capacitor under ideal conditions (nearly zero-length vias, tied straight to the
power-ground planes) and verifying that its inductance under those conditions is
substantially less than the much larger value of inductance measured when using
vias of a practical length.
The
second simplification is that I used physical models at a scale 100 times larger
than the real-life components I was trying to measure. This enlargement
multiplies the effective inductance of the component by a factor of precisely
100, making it possible to conduct accurate measurements with ease. It also made
it possible to machine the physical models without undue concern about the
mechanical tolerances involved in the machining process.
In all cases the effective inductance of the component is strongly influenced by its height about the nearest plane. A good discussion of this principle, and also the influence of the planes themselves, appears in the article "Parasitic Inductance of Bypass Capacitors".
Measurements were taken on six basic layouts (Figure 1).
Figure 1-For measurement purposes, each layout was fabricated at 100:1 scale from type 304 non-magnetic stainless steel.
Each layout was measured first using an equivalent via diameter of 0.010-in. and then again using an equivalent via diameter of 0.020-in. In both cases a set of four different via lengths (i.e., capacitor mounting heights) were used, equivalent to real-life dimensions of: 0.004, 0.006, 0.010 and 0.020-in. (Tables 1 and 2).
Table 1-Parasitic Inductance of Bypass Capacitors, nH, hole dia. 0.010 in.
Via length | 0603 skinny | 0603 fat | 0603 end | 0603 side | 0402 end | 0402 side |
---|---|---|---|---|---|---|
.004 | 1.51 | 0.95 | 0.50 | 0.36 | 0.42 | 0.26 |
.006 | 1.77 | 1.17 | 0.59 | 0.46 | 0.50 | 0.32 |
.010 | 2.18 | 1.52 | 0.77 | 0.61 | 0.67 | 0.40 |
.020 | 2.87 | 2.23 | 1.16 | 0.85 | 1.01 | 0.60 |
Table 2-Parasitic Inductance of Bypass Capacitors, nH, hole dia. 0.020 in.
Via length | 0603 skinny | 0603 fat | 0603 end | 0603 side | 0402 end | 0402 side |
---|---|---|---|---|---|---|
.004 | 1.51 | 0.89 | 0.42 | 0.33 | 0.38 | 0.21 |
.006 | 1.66 | 1.12 | 0.53 | 0.38 | 0.44 | 0.25 |
.010 | 2.13 | 1.47 | 0.68 | 0.51 | 0.58 | 0.32 |
.020 | 2.68 | 2.07 | 1.07 | 0.67 | 0.82 | 0.43 |
Bypass capacitor inductance, layout, resonance, multi-valued arrays, and a wealth of other topics are all included in my ever-popular (and oft-revised) class, High-Speed Digital Design.
Best Regards,
Dr. Howard Johnson